[Asterisk-Users] Asterisk - fax - spandsp

[Michael Welter]

> 
> How about this...
> 
> Replace the old text in /usr/src/zaptel/zaptel.conf.sample:
> # span=<span num>,<timing>,<line build out (LBO)>,<framing>,<coding>[,yellow]
> #                                                                           
> # The timing parameter determines the selection of primary, secondary, and
> # so on sync sources.  If this span should be considered a primary sync
> # source, then give it a value of "1".  For a secondary, use "2", and so on.   
> # To not use this as a sync source, just use "0"  
> 
> with this text:
> # span=<span num>,<timing>,<line build out (LBO)>,<framing>,<coding>[,yellow]
> # 
> # All T1/E1 spans generate a clocking signal on the transmit side. The          
> # timing parameter determines whether the clocking signal from the opposite
> # end of the T1/E1 is used to sync our clock. For T1/E1's connected to a
> # pstn provider (telco), chose 1 for using this T1 as the primary clock,
> # 2 for a secondary (if multiple T1/E1's are in use and the second T1 is
> # to be used for clock sync should the primary fail), or 3 for the next
> # T1, etc.  If the T1/E1 is connected to a channel bank or if the T1/E1
> # is not to be used for clock sync, then specify the timing as 0. (A quad
> # T1/E1 card should only have a single T1/E1 specified as timing = 1, or
> # primary clock sync.  Incorrect timing sync may cause clicks/noise in
> # the audio, poor quality faxes, or fax failures, etc.)
> 
> If this is helpful, I'll submit a bug for the text. Thoughts anyone?
> 
Very good.  Now I'll try to muddy the waters with my own ignorance on 
this subject.

Where is the clock source that the T1/E1 board, with "0" for timing, 
uses to generate the tx data stream?  Is there a PLL on each board?  Or 
is some central source used?

For example, I have one system with two separate T100P cards--one for a 
telco T-1 (#1) and the other for a channel bank (#2).  For timing, #1 
(telco) is set to "1" and #2 (channel bank) is set to "0".  How does 
card #2 get its timing to generate its tx stream?  Does card #1 
interrupt the CPU based on the retrieved clock stream, and the CPU drive 
the other boards based on #1's interrupts?