[Asterisk-Users] T1 Sync clarification

[Rich Adamson]

> >>What are the practical effects with in-correct clock sync
> >>-like to you hear odd buzzing, or dropped voice or gaps of audio ??
> > <snip>
> >As mentioned earlier, it depends entirely upon how far off one clock is
> >from the clock at the other end of the T1.
> > <snip>
> >If they are off by a little bit, you would see frame slips but probably
> >not hear any quality differences.
> > <snip>
> You would only have a fast slip rate if something is faulty. Anything 
> complying with the E1 or T1 specs should never have its clock >50ppm in 
> error. Anything coming from the PSTN is essentially bang on, as it comes 
> from an atomic clock.
> <snip>

So, to summarize and address the original posters questions and stop the
thread from deviating too far off topic... (add to the wiki?)

1. pstn providers worldwide have understood and addressed syncing of digital
   clocks (eg, T1/E1 clocks, not operating system clocks) for years. Its 
   probably safe to assume the majority of pstn providers either sync to
   some common source (eg, atomic clock), or, have internal mechanisms to
   ensure interoperability with all other providers. (Some exceptions do
   exist but their numbers are believed to be very small.)
2. For asterisk purposes, current T1/E1 facilities (regardless of source) 
   carry timing information embedded within the transmit leg (not an optional
   configuration parameter) that "is" used by the attached device for 
   recover of clock sync.
3. Channel banks typically have only a single T1/E1 uplink, and therefore
   recover clock sync from the T1/E1 receive-side of that link. If a
   specific channel bank model supported two or more uplinks, then the
   manufacturer would provide a user configurable option to select which
   uplink to use for clock sync. 
4. Likewise, since the Digium TE410P (as an example only) supports four
   T1/E1 inputs, a user configurable option is provided to select "one"
   port for primary clock sync, and alternates (secondaries) should the
   selected primary T1/E1 fail. Users should select the T1/E1 link that
   is closest to the pstn where possible.
5. Asterisk configurations that include multiple T1/E1 links that close
   a wide area loop, for example:
     ast#1 -> T1 -> ast#2 -> T1 -> ast#3 -> T1 -> ast#1
   should not be of concern from a clock sync perspective as each system
   recovers the clock sync from its associated T1 receive leg "if" that
   receive leg is specified correctly in the TE410P configuration.
   EXCEPT...
   If this same config included a pstn T1 link into ast#2 (as an example)
   then the TE410P should be configured to obtain clock sync from the
   port on which the pstn T1 is connected.
   If that is "not" configured, then clock sync within the wide area loop
   is 100% dependent upon the accuracy of the TE410P clock (which is not
   a high-accuracy clock), and frame slipage "will" occur at the T1
   interface to the pstn.
6. If frame slipage does occur, the impact is:
   a. for small slipage: users would not notice
   b. for medium slipage: repetitive clicks are likely to be heard across
      all voice channels in use, and fax machines are likely to be less
      then reliable.
   c. for large slipage: T1/E1 circuits are likely to fail then recover
      intermitently.

General Rules of Thumb:
1. Devices with a single T1/E1 interface will automatically recover clock
   sync from the receive-side of the T1/E1, and users never need to be
   concerned with it.
2. Devices that have multiple T1/E1 interfaces (like the TE410P) need to
   select a clock sync source, and that source should be a T1/E1 port that
   is closest to the pstn (or derived from the pstn) if it exists.

Anyone take exception to any of this before it goes into the wiki?

Rich