[Asterisk-Users] e100p and E-bit alarm indication

[Konrad Gorski]

Hi Lele,
that did the work.
now my telco is happy too.
many thanks
Konrad

Lele Forzani wrote:

> We connected an * box with an e100p to an E1/PRI from a telco here in Italy.
> 
> After we had it working perfectly the telco told us that, despite the circuit 
> appeared to work fine, and we could place calls on it, they had an "E-bit2 
> alarm indication constantly on that caused the circuit to be flagged as 
> "faulty" every time.
> 
> (The E-bit indication, is an alarm sent back from us to the telco, telling 
> them we are getting CRC-errored data from them. It should be incrementing the 
> "Far-End SES" on their side)
> 
> Since the circuit appeared to work fine, calls went through, and the crc 
> counters on our side was zero, it was impossible we were getting that many 
> errors and something must have been wrong with our handling of the E-bit 
> signal.
> 
> I've come across the DS21554 framer documentation and i've seen that it has a 
> flag for enabling the E-bit generation in the "TCR2" register and that the 
> wct1xxp.c wasn't setting it. 
> 
> So i tried this small patch and the telco is perfectly happy with it, now, the 
> E-bit error has disappeared.
> 
> 
> Since there had been a thread in May (started by Konrad Gorsky) about weird 
> far end CRC errors i'm posting in the hope to help somebody.
> 
> Note that i do not have a clue on what this does to the *T1* framer. I do not 
> have the specs for it!
> 
> bye
> lele
> 
> 
> 
> 
> 
> --- zaptel/wct1xxp.c    2003-09-12 10:12:01.000000000 +0200
> +++ zaptel-i/wct1xxp.c  2003-09-11 19:24:53.000000000 +0200
> @@ -411,13 +411,14 @@
>         int alreadyrunning = wc->span.flags & ZT_FLAG_RUNNING;
>         long flags;
>         char *crcing = "";
> -       unsigned char ccr1, tcr1;
> +       unsigned char ccr1, tcr1, tcr2;
> 
>         spin_lock_irqsave(&wc->lock, flags);
> 
>         /* Build up config */
>         ccr1 = 0;
>         tcr1 = 8;
> +       tcr2 = 0;
>         if (wc->span.lineconfig & ZT_CONFIG_CCS) {
>                 coding = "CCS"; /* Receive CCS */
>                 ccr1 |= 8;
> @@ -433,9 +434,11 @@
>         }
>         if (wc->span.lineconfig & ZT_CONFIG_CRC4) {
>                 ccr1 |= 0x11;
> +               tcr2 |= 0x02;   // xxx Enable E-bit alarm
>                 crcing = " with CRC4";
>         }
>         __t1_set_reg(wc, 0x12, tcr1);
> +       __t1_set_reg(wc, 0x13, tcr2);
>         __t1_set_reg(wc, 0x14, ccr1);
>         __t1_set_reg(wc, 0x18, 0x20);   /* 120 Ohm */
> 
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