[asterisk-dev] Hardwareless PCI Card Simulator

Luigi Rizzo rizzo at icir.org
Tue May 9 22:39:21 MST 2006


On Wed, May 10, 2006 at 10:11:26AM +1200, Derek Smithies wrote:
> Hi,
> 
> On Tue, 9 May 2006, Hugo Saporetti Junior wrote:
> > I would like to know if there's any software to simulate a PCI WCFXO
> > card. If so, where could I download it? I want to use it with
> > Zaptel/Asterisk. Regards
> > 
> 
> This is one of those questions that has been posed many times in the past.
> The typical answer is 
>   "no, not possible" and "the timing won't allow it" etc.
> 
> These statements are correct, but I have yet to see an explanation of why 
> the timing will not allow it.
> 
> The reason why no software to simulate a card is very simple:
> 
>  Every millisecond, there is one interrupt generated by the card. The 
> driver has to collect 8 bytes for each active channel from the card.
> Thus, it is not inconceivable for the driver to have to collect 240 bytes 
> from the card every millisecond.
> 
> This places a noticable load on the PCI bus. With other activity on the 
> bus (database acccess etc) you will get missed data transfers, and the 
> audio quality will drop.

> Current computers cannot (close, but not yet) simulate the one 
> interrupt per ms. Once computers get another couple of orders of 
> magnitude faster it may be possible. 

sorry but your statement is totally incorrect. 

First, many existing system routinely process interrupts (timer, device
driver polling etc) at a rate of 1KHz or above, and these involve
significantly large bus transactions (e.g. moving packets in and out
of a network card). I have always run my kernels with HZ=1000
since 1996, and this is on 66MHz and 133 MHz CPUs.

While some PCI transactions _can_ be extremely long due to bus
contention etc. (I have personally measured times up to 20-30 microseconds
for a simple read from a PCI bus, but that was on a box handling
about 20-30k interrupts per second on a machine with 4 network cards
bombarded with over 100k packets per second each),
burst accesses only pay the penalty
on the first access to the bus, the rest of the transaction runs at
the full rate of one word per clock tick. In other word, 240 bytes
per millisecond from one card are quite easy to handle by the hw.

The second reason why your statement is incorrect is that such a
simulator would not have to hit the PCI bus at all - it would just
have to produce/consume the data at the desired rate, which places
a negligible load to any modern, and even obsolete, system.

	cheers
	luigi



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