[Asterisk-Dev] Asterisk Hardware Platform - Intel x86 versus Intel RISC Xscale (ARM)

Miroslav Nachev miro at space-comm.com
Fri Nov 26 04:04:48 MST 2004


   Dear Holger,

   Do you know is that problem is fixed in the new Xscale version? I
mean that the old version is 255 and 425. The new CPU versions are 270
and 465 respectively.
   

   Best Regards,
   Miroslav Nachev

>> HS> One thing that is always an issue with a RISC type chip is
>> HS> alignment. You might need to adjust your source code to get
>> HS> alignment correct.
>>
>>    Can you clarify this?

HS> When you have a memory structure like this:

HS> +---------+
HS> |  byte   |  00
HS> +---------+
HS> |         |  01
HS> +         +
HS> |         |  02
HS> +  long   +
HS> |         |  03
HS> +         +
HS> |         |  04
HS> +---------+

HS> then a x86 (or CISC) chip can access the 32 bit value with some penalty,
HS> but it can access it.

HS> However, ARM chips (and Intel XScale is a sub-architecture of ARM) and
HS> some other RISC chips can't access that. They can only fetch data from 32
HS> bit boundaries. Therefore, the processor throws an exception.

HS> The arm-version of the Linux kernel can catch this exception, use two 32
HS> bit accesses to get the 32 bit long. Then they assemble the data and
HS> return from the exception.

HS> Unfortunately, this takes an awful lot of time.


HS> Usually this happens only when you have external things force you to have
HS> this layout, e.g. it happened for me in fdisk (because of the layout of
HS> the MBR sector) or in libusb. Here, the format of some USB urb's had this
HS> weird alignment.

HS> So, it's rare, but it happens. In your own programs, it usually doesn't
HS> happen, because you do either:

HS> +---------+
HS> |         |  00
HS> +         +
HS> |         |  01
HS> +  long   +
HS> |         |  02
HS> +         +
HS> |         |  03
HS> +---------+
HS> |  byte   |  04
HS> +---------+

HS> or

HS> +---------+
HS> |  byte   |  00
HS> +---------+
HS> | <empty> |  01
HS> +---------+
HS> | <empty> |  02
HS> +---------+
HS> | <empty> |  03
HS> +---------+
HS> |         |  04
HS> +         +
HS> |         |  05
HS> +  long   +
HS> |         |  06
HS> +         +
HS> |         |  07
HS> +---------+

HS> The latter is the default behavior of arm-linux-gcc.


HS> There is some iaxclient based Phone software for ARM based PDAs available
HS> and they this alignment problem in the IAX protocol. Eventually a patch
HS> made it into iaxclient so that the assembly of the 32 bit long value was
HS> done in user-space, not in kernel, which is quite faster.

HS> And because this was necessary in iaxclient, I think it will bite you in
HS> Asterisk as well.

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