[asterisk-users] Trouble with TE122 on HP DL120G6 - can't disable USB

Tony Mountifield tony at softins.co.uk
Wed Dec 1 09:14:58 CST 2010


Shaun, thanks for the reply and the hints!

In article <4CF3E7D4.6080102 at digium.com>,
Shaun Ruffell <sruffell at digium.com> wrote:
> On 11/29/2010 11:11 AM, Tony Mountifield wrote:
> > I have recently built a single-T1 Asterisk box using an HP DL120G6
> > with a Digium TE122 card.
> > 
> > I was finding that I was getting missed interrupts on the TE122,
> > causing the driver to report that it was increasing latency. It kept
> > doing this until the T1 did not work reliably.
> 
> DAHDI does add idle buffers which can allow the max latency to be caped
> at something low.  This change went in revision 7517 [1].  You would
> still have data problems in the channel but you wouldn't have to worry
> about the framer getting confused.
> 
> Some other things you might try:
> 
> 1) Is there an option for "legacy keyboard emulation" in your BIOS that
> you could disable?  It could be that there is a long running System
> Management Interrupt running to see if it should make the USB keyboard
> look like a PS/2 keyboard for DOS, etc..

Couldn't find anything like that. It looks like the kbd and mouse are
just implemented as USB on this hardware.

> 2) Do you have the latest BIOS for the DL120G6?

The box was brand new recently, although I assume the BIOS doesn't play
any part once Linux is booted and running.

> 3) Update your kernel to the 2.6.32 stable series in case the problem
> really is in the USB stack.

That would be a bit tricky at the moment as it's using CentOS 4.
I'll be interested to explore CentOS 6 when it is released.

> 4) Use /proc/irq/<IRQ num>/smp_affinity to force the USB interrupts onto
> CPU0 and the TE122 interrupts onto CPU1 (assuming the DL120G6 is dual core).

This seems to have helped, and the box now appears to run reliably.
I needed first to disable the irqbalance daemon, and then I made an
init script that would bind the TE122 interrupt to core 3 and all
the other interrupts to cores 0-2 (it's a quad-core CPU).

Thanks again for your help.

Tony
-- 
Tony Mountifield
Work: tony at softins.co.uk - http://www.softins.co.uk
Play: tony at mountifield.org - http://tony.mountifield.org



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