[asterisk-users] Re: Balancing interrupts.
Daniel Pittman
daniel at rimspace.net
Fri May 4 00:22:07 MST 2007
Steve Edwards <asterisk.org at sedwards.com> writes:
> I see the following on one of my new servers:
>
> -ts10::sedwards:~$ cat /proc/interrupts
> CPU0 CPU1 CPU2 CPU3
> 0: 2979045 2988620 87780075 87779501 IO-APIC-edge timer
[...]
> 225: 4611916 681023 84732445 89903138 IO-APIC-level wct4xxp
> NMI: 0 0 0 0
> LOC: 181534588 181534654 181534653 181534652
> ERR: 0
> MIS: 0
>
> -ts10::sedwards:~$ ps -e | grep bal
> 2633 ? 00:00:00 irqbalance
>
> Should I be concerned that cpu1 is servicing only 700,000 interrupts
> from my te410p while cpu3 is servicing almost 90,000,000?
>
> I thought this is what irqbalance was for...
Actually, what you *really* want (for performance reasons) is to have
one CPU handle *all* the interrupts and all the threads that talk to
hardware for that card, if possible.
Every time you move the IRQ to a different CPU you lose a bunch of
cycles reloading data from main memory into the L2 and L1 cache, cycles
that can't be used elsewhere.
Binding that interrupt to one specific CPU -- and your NIC to a
different CPU -- is generally a good idea. If you can keep the threads
that handle those signals and the hardware on that same CPU you increase
efficiency a bit more.
Moving the IRQ has plenty of cost and isn't a great plan. :)
Regards,
Daniel
--
Digital Infrastructure Solutions -- making IT simple, stable and secure
Phone: 0401 155 707 email: contact at digital-infrastructure.com.au
http://digital-infrastructure.com.au/
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