[Asterisk-Users] Channel bank timing

[Andrew Kohlsmith]

On Tuesday 27 December 2005 05:25, Dinesh Nair wrote:
> what would the equivalent be for the digium cards ? would something like
> the following work ?
>
> span=1,0,0
> span=2,1,0
> span=3,2,0
> span=4,0,0
>
> (note that span's 1 and 4 are set as PRI NET)

What is each span connected to?  Remember that Digium multispan cards can only 
have one clock 'master' for all spans.  Span 3 in this case is shown as the 
secondary source, which means that the device connected to span 3 is 
expecting to be the clocking source.  This means that there will be frame 
slips and other nasties (HDLC aborts for PRI, etc.) on span 3 until span 2 
goes down and span 3 becomes the sync source.

-A.