[Asterisk-Users] Channel bank timing

[Chris Mason]

Andrew Kohlsmith wrote:

>Tell the Channel Banks clock to the line, and have the Sangoma card NOT sync 
>to anything (i.e. the A104 is the master, the channel banks the slaves).
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I set the card up so that
Port1
TE_CLOCK= MASTER
TE_REF_CLOCK= 0
Port2
TE_CLOCK = NORMAL
TE_REF_CLOCK = 1

which should make Port 2 take it's timing from Port 1 and Port 1 take 
it's timing from the onboard clock.

>Basically clocking works this way:  Each end of a T1 sends data generated by 
>an on-board clock.  These two clocks (one at each side) needs to be in 
>perfect sync with each other or you get frame slips and other nasties.  The 
>solution is to have one of these clocks lock or synchronize to the far side.  
>This is know by several names, among them "line clock", "recovered clock", 
>"slave clock", etc.  The side that is not trying to synchronize is also known 
>my several names... "master clock", "internal clock", etc.
>  
>
On the 600 I set it to Timing = Network, but on the 750 I can't figure 
out which one of these it should be.
LOOP
LOCAL
EXTERNAL

On the 600, the manual says:
"The selected clock option always designates the clock source for 
transmission. Clocking necessary for receiving data is always recovered 
from incoming data."

I think the 600 manual also gives me the answer for the 750:
Network Timing - The network is the source of timing. The received data 
clocking is looped back to the network, where it is used to determine 
the transmission timing. This option is also referred to as loop timed 
as the transmission clock is derived from the received clock.

So for the 750, loop would be the same thing.

So, as far as I can tell, everything is set correctly. Which is a 
problem because it does not sound right.

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