[Asterisk-Users] Digital Line Distortion

[Nicolas Bougues]

On Mon, May 03, 2004 at 09:28:56PM +1000, Adam Goryachev wrote:
> Firstly, the problem...
> 
> Ever since I installed and setup asterisk, I have had various problems,
> initially it was echo caused by the ISDN (isdn4linux) card I was using.
> So, I upgraded to the X101P from digium. I still had echo, so I figured
> it was also caused by the ATA186 (cisco) I was using. So, I upgraded
> again to the TDM40B quad FXS card. This solved pretty much all my
> problems, except eventually, I needed more incoming lines. So, again, I
> upgraded to a digital line (10 channel PRI/E1) and purchased the brand
> new TE405p from digium... Now, eventually I got this working properly,
> for incoming and outbound calls, I have incoming callerid working,
> etc...
> 
> However, ever since I did this, I continually get complaints from people
> about how terrible my phone lines are. Not *everyone* complains, but
> most people do....
> 

We did face what may be the same problem here.

The problem came from the fact that on some motherboards (well, *most*
motherboards, as far as I tested), the TE405P has a problem which
makes it send every one in 8 (or was it 16?) bytes as 0xFF (instead of
whatever the U/A-law value may have been).

On the RX side of things, it was always perfect, thus when connecting to
a local IP phone we heard a nice sound, but the remote party always
had a quite garbled output.

You can check it quite easily :
- plug a crossover cable between two ports
- do not start Asterisk (but load and ztcfg everything)
- cat /dev/zap/span1/1 on one terminal
- ls >/dev/zap/span2/1 on another terminal (provided that spans 1 and
  2 are connected together)
- if everything works well, you should have a perfect output for your
  ls on the "cat" terminal. Otherwise, try hexdump and watch the
  columns with FF.

It was solved by using a PCI 2.2 compliant motherboard (i865
based). It's quite an odd behaviour, and it's still not clear to me
why it happens. I initialiy thought it could be solved by fixing the
FPGA VHDL, but I'm not an expert in that field.

--
Nicolas Bougues
Axialys Interactive