[aadk-commits] qwell: u-boot/trunk r71 -
/u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h
aadk-commits at lists.digium.com
aadk-commits at lists.digium.com
Fri Dec 8 12:53:00 MST 2006
Author: qwell
Date: Fri Dec 8 13:53:00 2006
New Revision: 71
URL: http://svn.digium.com/view/aadk?view=rev&rev=71
Log:
Lower the default SPI clock in u-boot from 31.25mhz to 16.66mhz.
Modified:
u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h
Modified: u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h?view=diff&rev=71&r1=70&r2=71
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h (original)
+++ u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h Fri Dec 8 13:53:00 2006
@@ -14,7 +14,7 @@
/* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
/* Values can range from 2-65535 */
/* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */
-#define CONFIG_SPI_BAUD 2
+#define CONFIG_SPI_BAUD 3
#define CONFIG_SPI_BAUD_INITBLOCK 4
/* CONFIG_CLKIN_HZ is any value in Hz */
@@ -34,7 +34,7 @@
#define CONFIG_CCLK_DIV 1
/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
/* Values can range from 1-15 */
-#define CONFIG_SCLK_DIV 4
+#define CONFIG_SCLK_DIV 5
#if ( CONFIG_CLKIN_HALF == 0 )
#define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
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