[svn-commits] tzafrir: linux/trunk r10346 - /linux/trunk/drivers/dahdi/xpp/card_pri.c

[SVN commits to the Digium repositories]

Author: tzafrir
Date: Tue Nov 29 17:37:33 2011
New Revision: 10346

URL: http://svnview.digium.com/svn/dahdi?view=rev&rev=10346
Log:
xpp: pri: fix RS1 init in E1 CAS mode

Force some reserved bits to really be 1 in E1 mode (otherwise
terrorists will win).

(Closes issue DAHLIN-264)

Signed-off-by: Oron Peled <oron.peled at xorcom.com>

Modified:
    linux/trunk/drivers/dahdi/xpp/card_pri.c

Modified: linux/trunk/drivers/dahdi/xpp/card_pri.c
URL: http://svnview.digium.com/svn/dahdi/linux/trunk/drivers/dahdi/xpp/card_pri.c?view=diff&rev=10346&r1=10345&r2=10346
==============================================================================
--- linux/trunk/drivers/dahdi/xpp/card_pri.c (original)
+++ linux/trunk/drivers/dahdi/xpp/card_pri.c Tue Nov 29 17:37:33 2011
@@ -1034,6 +1034,17 @@
 	}
 #endif
 	if(force_cas) {
+		if(priv->pri_protocol == PRI_PROTO_E1) {
+			int	rs1 = 0x0B;
+
+			/*
+			 * Set correct X1-X3 bits in the E1 CAS MFAS
+			 * They are unused in E1 and should be 1
+			 */
+			XPD_DBG(GENERAL, xpd, "%s: rs1(0x%02X) = 0x%02X\n",
+				__FUNCTION__, REG_RS1_E, rs1);
+			write_subunit(xpd, REG_RS1_E, rs1);
+		}
 		xsp |= REG_XSP_E_CASEN;	/* Same as REG_FMR5_T_EIBR for T1 */
 	}
 	XPD_DBG(GENERAL, xpd, "%s: xsp(0x%02X) = 0x%02X\n", __FUNCTION__, REG_XSP_E, xsp);