[svn-commits] sruffell: linux/trunk r9327 - /linux/trunk/drivers/dahdi/voicebus/voicebus.c

[SVN commits to the Digium repositories]

Author: sruffell
Date: Tue Sep 14 09:02:35 2010
New Revision: 9327

URL: http://svnview.digium.com/svn/dahdi?view=rev&rev=9327
Log:
wcte12xp, wctdm24xxp: '0x0c' -> PCI_CACHE_LINE_SIZE.

Magic number removal.

Signed-off-by: Shaun Ruffell <sruffell at digium.com>

Modified:
    linux/trunk/drivers/dahdi/voicebus/voicebus.c

Modified: linux/trunk/drivers/dahdi/voicebus/voicebus.c
URL: http://svnview.digium.com/svn/dahdi/linux/trunk/drivers/dahdi/voicebus/voicebus.c?view=diff&rev=9327&r1=9326&r2=9327
==============================================================================
--- linux/trunk/drivers/dahdi/voicebus/voicebus.c (original)
+++ linux/trunk/drivers/dahdi/voicebus/voicebus.c Tue Sep 14 09:02:35 2010
@@ -243,7 +243,7 @@
 	int i;
 	struct voicebus_descriptor *d;
 	const u32 END_OF_RING = 0x02000000;
-	u8 cache_line_size;
+	u8 cacheline_size;
 
 	BUG_ON(!dl);
 
@@ -253,15 +253,16 @@
 	 * cache-line sizes that we support.
 	 *
 	 */
-	if (pci_read_config_byte(vb->pdev, 0x0c, &cache_line_size)) {
+	if (pci_read_config_byte(vb->pdev, PCI_CACHE_LINE_SIZE,
+				 &cacheline_size)) {
 		dev_err(&vb->pdev->dev, "Failed read of cache line "
 			"size from PCI configuration space.\n");
 		return -EIO;
 	}
 
-	if ((0x08 == cache_line_size) || (0x10 == cache_line_size) ||
-	    (0x20 == cache_line_size)) {
-		dl->padding = (cache_line_size*sizeof(u32)) - sizeof(*d);
+	if ((0x08 == cacheline_size) || (0x10 == cacheline_size) ||
+	    (0x20 == cacheline_size)) {
+		dl->padding = (cacheline_size*sizeof(u32)) - sizeof(*d);
 	} else {
 		dl->padding = 0;
 	}
@@ -292,7 +293,7 @@
 	struct voicebus_descriptor *d;
 	struct voicebus_descriptor_list *dl = &vb->txd;
 	const u32 END_OF_RING = 0x02000000;
-	u8 cache_line_size;
+	u8 cacheline_size;
 
 	WARN_ON(!dl);
 	WARN_ON((NULL == vb->idle_vbb) || (0 == vb->idle_vbb_dma_addr));
@@ -303,15 +304,16 @@
 	 * cache-line sizes that we support.
 	 *
 	 */
-	if (pci_read_config_byte(vb->pdev, 0x0c, &cache_line_size)) {
+	if (pci_read_config_byte(vb->pdev, PCI_CACHE_LINE_SIZE,
+				 &cacheline_size)) {
 		dev_err(&vb->pdev->dev, "Failed read of cache line "
 			"size from PCI configuration space.\n");
 		return -EIO;
 	}
 
-	if ((0x08 == cache_line_size) || (0x10 == cache_line_size) ||
-	    (0x20 == cache_line_size)) {
-		dl->padding = (cache_line_size*sizeof(u32)) - sizeof(*d);
+	if ((0x08 == cacheline_size) || (0x10 == cacheline_size) ||
+	    (0x20 == cacheline_size)) {
+		dl->padding = (cacheline_size*sizeof(u32)) - sizeof(*d);
 	} else {
 		dl->padding = 0;
 	}
@@ -637,16 +639,17 @@
 	u32 reg;
 	u32 pci_access;
 	const u32 DEFAULT_PCI_ACCESS = 0xfffc0002;
-	u8 cache_line_size;
+	u8 cacheline_size;
 	BUG_ON(in_interrupt());
 
-	if (pci_read_config_byte(vb->pdev, 0x0c, &cache_line_size)) {
+	if (pci_read_config_byte(vb->pdev, PCI_CACHE_LINE_SIZE,
+				 &cacheline_size)) {
 		dev_err(&vb->pdev->dev, "Failed read of cache line "
 			"size from PCI configuration space.\n");
 		return -EIO;
 	}
 
-	switch (cache_line_size) {
+	switch (cacheline_size) {
 	case 0x08:
 		pci_access = DEFAULT_PCI_ACCESS | (0x1 << 14);
 		break;
@@ -661,7 +664,7 @@
 			dev_warn(&vb->pdev->dev, "Host system set a cache "
 				 "size of %d which is not supported. "
 				 "Disabling memory write line and memory "
-				 "read line.\n", cache_line_size);
+				 "read line.\n", cacheline_size);
 		}
 		pci_access = 0xfe584202;
 		break;