[svn-commits] rmeyerriecks: branch linux/mspiceland/dahdi-qfalc31 r7404 - /linux/team/mspic...
SVN commits to the Digium repositories
svn-commits at lists.digium.com
Wed Oct 14 17:24:59 CDT 2009
Author: rmeyerriecks
Date: Wed Oct 14 17:24:55 2009
New Revision: 7404
URL: http://svnview.digium.com/svn/dahdi?view=rev&rev=7404
Log:
This bit set was clobbering the span's timing, forcing
the fpga into recovered timing(RCLK) output on SCLK even if
it was set to provide system timing(MCLK) on SCLK. The
theory is that this problem only presented itself in FALC
v3.1 due to a difference in PLL types between the two versions.
Modified:
linux/team/mspiceland/dahdi-qfalc31/drivers/dahdi/wct4xxp/base.c
Modified: linux/team/mspiceland/dahdi-qfalc31/drivers/dahdi/wct4xxp/base.c
URL: http://svnview.digium.com/svn/dahdi/linux/team/mspiceland/dahdi-qfalc31/drivers/dahdi/wct4xxp/base.c?view=diff&rev=7404&r1=7403&r2=7404
==============================================================================
--- linux/team/mspiceland/dahdi-qfalc31/drivers/dahdi/wct4xxp/base.c (original)
+++ linux/team/mspiceland/dahdi-qfalc31/drivers/dahdi/wct4xxp/base.c Wed Oct 14 17:24:55 2009
@@ -2133,7 +2133,6 @@
wc->spansstarted++;
/* enable interrupts */
/* Start DMA, enabling DMA interrupts on read only */
- wc->dmactrl = 1 << 29;
#if 0
/* Enable framer only interrupts */
wc->dmactrl |= 1 << 27;
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