[svn-commits] sruffell: branch linux/sruffell/private r4966 - /linux/team/sruffell/private/...

SVN commits to the Digium repositories svn-commits at lists.digium.com
Fri Sep 19 11:04:25 CDT 2008


Author: sruffell
Date: Fri Sep 19 11:04:24 2008
New Revision: 4966

URL: http://svn.digium.com/view/dahdi?view=rev&rev=4966
Log:
mfredrickson made changes to support reading / writing in 4 bytes at a time
which appears to eliminate the patgen errors on the aa300.

Issue: B410P-28

Modified:
    linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/base.c
    linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/wcb4xxp.h

Modified: linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/base.c
URL: http://svn.digium.com/view/dahdi/linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/base.c?view=diff&rev=4966&r1=4965&r2=4966
==============================================================================
--- linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/base.c (original)
+++ linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/base.c Fri Sep 19 11:04:24 2008
@@ -133,6 +133,37 @@
 	}
 
 	return ret;
+}
+
+static inline unsigned int __pci_in32(struct b4xxp *b4, const unsigned int reg)
+{
+	unsigned int ret = ioread32(b4->addr + reg);
+
+#ifdef DEBUG_LOWLEVEL_REGS
+	if(unlikely(DBG_REGS)) {
+		drv_dbg(b4->dev, "read 0x%04x from 0x%08x\n", ret, b4->addr + reg);
+	}
+#endif
+	if(unlikely(pedanticpci)) {
+		udelay(3);
+	}
+
+	return ret;
+}
+
+static inline void __pci_out32(struct b4xxp *b4, const unsigned int reg, const unsigned int val)
+{
+#ifdef DEBUG_LOWLEVEL_REGS
+	if(unlikely(DBG_REGS)) {
+		drv_dbg(b4->dev, "writing 0x%02x to 0x%08x\n", val, b4->addr + reg);
+	}
+#endif
+	iowrite32(val, b4->addr + reg);
+
+	if(unlikely(pedanticpci)) {
+		udelay(3);
+		(void)ioread8(b4->addr + R_STATUS);
+	}
 }
 
 static inline void __pci_out8(struct b4xxp *b4, const unsigned int reg, const unsigned char val)
@@ -204,6 +235,23 @@
 	return ret;
 }
 
+static inline unsigned int b4xxp_getreg32(struct b4xxp *b4, const unsigned int reg)
+{
+	unsigned int ret;
+	unsigned long irq_flags;
+
+	spin_lock_irqsave(&b4->reglock, irq_flags);
+	ret = __pci_in32(b4, reg);
+	spin_unlock_irqrestore(&b4->reglock, irq_flags);
+
+#ifndef DEBUG_LOWLEVEL_REGS
+	if(unlikely(DBG_REGS)) {
+		dev_dbg(b4->dev, "read 0x%04x from 0x%p\n", ret, b4->addr + reg);
+	}
+#endif
+	return ret;
+}
+
 static inline unsigned short b4xxp_getreg16(struct b4xxp *b4, const unsigned int reg)
 {
 	unsigned int ret;
@@ -219,6 +267,20 @@
 	}
 #endif
 	return ret;
+}
+
+static inline void b4xxp_setreg32(struct b4xxp *b4, const unsigned int reg, const unsigned int val)
+{
+	unsigned long irq_flags;
+
+#ifndef DEBUG_LOWLEVEL_REGS
+	if(unlikely(DBG_REGS)) {
+		dev_dbg(b4->dev, "writing 0x%02x to 0x%p\n", val, b4->addr + reg);
+	}
+#endif
+	spin_lock_irqsave(&b4->reglock, irq_flags);
+	__pci_out32(b4, reg, val);
+	spin_unlock_irqrestore(&b4->reglock, irq_flags);
 }
 
 static inline void b4xxp_setreg8(struct b4xxp *b4, const unsigned int reg, const unsigned char val)
@@ -620,6 +682,24 @@
 	if(!maxwait) {
 		if(printk_ratelimit())
 			dev_warn(b4->dev, "hfc_readcounter16(reg 0x%02x) timed out waiting for data to settle!\n", reg);
+	}
+
+	return r1;
+}
+
+static inline unsigned int hfc_readcounter32(struct b4xxp *b4, const unsigned int reg)
+{
+	unsigned int r1, r2;
+	unsigned long maxwait = 1048576;
+
+	do {
+		r1 = b4xxp_getreg32(b4, reg);
+		r2 = b4xxp_getreg32(b4, reg);
+	} while((r1 != r2) && maxwait--);
+
+	if(!maxwait) {
+		if(printk_ratelimit())
+			dev_warn(b4->dev, "hfc_readcounter32(reg 0x%02x) timed out waiting for data to settle!\n", reg);
 	}
 
 	return r1;
@@ -1181,7 +1261,6 @@
 	}
 }
 
-
 /*
  * Look at one B-channel FIFO and determine if we should exchange data with it.
  * It is assumed that the S/T port is active.
@@ -1189,11 +1268,10 @@
  */
 static int hfc_poll_one_bchan_fifo(struct b4xxp_span *span, int c)
 {
-	int fifo, i, zlen, z1, z2, ret;
+	int fifo, zlen, z1, z2, ret;
 	unsigned long irq_flags;
 	struct b4xxp *b4;
 	struct dahdi_chan *chan;
-	char b, mwdata[] = { 0x1e, 0x0b, 0x0b, 0x1e, 0x9e, 0x8b, 0x8b, 0x9e };
 
 	ret = 0;
 	b4 = span->parent;
@@ -1205,14 +1283,13 @@
 /* select RX FIFO */
 	hfc_setreg_waitbusy(b4, R_FIFO, (fifo << V_FIFO_NUM_SHIFT) | V_FIFO_DIR | V_REV);
 
-	get_Z(z1, z2, zlen);
+	get_Z32(z1, z2, zlen);
 
 /* TODO: error checking, full FIFO mostly */
 
 	if(zlen >= DAHDI_CHUNKSIZE) {
-		for(i=0; i < DAHDI_CHUNKSIZE; i++) {
-			chan->readchunk[i] = b4xxp_getreg8(b4, A_FIFO_DATA0);
-		}
+		*(unsigned int *)&chan->readchunk[0] = b4xxp_getreg32(b4, A_FIFO_DATA2);
+		*(unsigned int *)&chan->readchunk[4] = b4xxp_getreg32(b4, A_FIFO_DATA2);
 
 /*
  * now TX FIFO
@@ -1223,21 +1300,11 @@
  * Write the last byte _NOINC so that if we don't get more data in time, we aren't leaking unknown data
  * (See HFC datasheet)
  */
+
 		hfc_setreg_waitbusy(b4, R_FIFO, (fifo << V_FIFO_NUM_SHIFT) | V_REV);
-		for(i=0; i < DAHDI_CHUNKSIZE - 1; i++) {
-			if(unlikely(milliwatt))
-				b = mwdata[i % 8];
-			else
-				b = chan->writechunk[i];
-
-			b4xxp_setreg8(b4, A_FIFO_DATA0, b);
-		}
-
-		if(unlikely(milliwatt))
-			b = mwdata[i % 8];
-		else
-			b = chan->writechunk[i];
-		b4xxp_setreg8(b4, A_FIFO_DATA0_NOINC, b);
+
+		b4xxp_setreg32(b4, A_FIFO_DATA2, *(unsigned int *) &chan->writechunk[0]);
+		b4xxp_setreg32(b4, A_FIFO_DATA2, *(unsigned int *) &chan->writechunk[4]);
 
 		ret = 1;
 	}
@@ -1287,7 +1354,7 @@
 	int f1, f2, flen, z1, z2, zlen;
 
 	get_F(f1, f2, flen);
-	get_Z(z1, z2, zlen);
+	get_Z32(z1, z2, zlen);
 
 	pr_info("%s: (fifo %d): f1/f2/flen=%d/%d/%d, z1/z2/zlen=%d/%d/%d\n", prefix, fifo, f1, f2, flen, z1, z2, zlen);
 }
@@ -1331,7 +1398,7 @@
 
 	spin_lock_irqsave(&b4->fifolock, irq_flags);
 	hfc_setreg_waitbusy(b4, R_FIFO, (fifo << V_FIFO_NUM_SHIFT) | V_FIFO_DIR);
-	get_Z(z1, z2, zlen);
+	get_Z32(z1, z2, zlen);
 	spin_unlock_irqrestore(&b4->fifolock, irq_flags);
 
 	zlen++;		/* include STAT byte that the HFC injects after FCS */
@@ -1422,7 +1489,7 @@
 	spin_lock_irqsave(&b4->fifolock, irq_flags);
 	hfc_setreg_waitbusy(b4, R_FIFO, (fifo << V_FIFO_NUM_SHIFT));
 
-	get_Z(z1, z2, zlen);
+	get_Z32(z1, z2, zlen);
 
 /* TODO: check zlen, etc. */
 

Modified: linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/wcb4xxp.h
URL: http://svn.digium.com/view/dahdi/linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/wcb4xxp.h?view=diff&rev=4966&r1=4965&r2=4966
==============================================================================
--- linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/wcb4xxp.h (original)
+++ linux/team/sruffell/private/dahdi-linux-wcb4xxp/drivers/dahdi/wcb4xxp/wcb4xxp.h Fri Sep 19 11:04:24 2008
@@ -507,6 +507,19 @@
 		zlen += (HFC_ZMAX - HFC_ZMIN) + 1;	\
 	}
 
+#define get_Z32(z1, z2, zlen) {					\
+	{ 							\
+		unsigned int tmp;				\
+		tmp = hfc_readcounter32(b4, A_Z12);		\
+		z1 = tmp & 0xffff; 				\
+		z2 = (tmp >> 16); 				\
+		zlen = z1 - z2;					\
+								\
+		if(zlen < 0)					\
+			zlen += (HFC_ZMAX - HFC_ZMIN) + 1;	\
+		}						\
+	}
+
 #define flush_pci()	(void)ioread8(b4->addr + R_STATUS)
 
 #endif	/* __KERNEL__ */




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