[Asterisk-cvs] zaptel tor2.c,1.19,1.20

[jim at lists.digium.com]

Update of /usr/cvsroot/zaptel
In directory mongoose.digium.com:/tmp/cvs-serv11643

Modified Files:
	tor2.c 
Log Message:
Majorly improved I/O efficiency between tor2 board and system.


Index: tor2.c
===================================================================
RCS file: /usr/cvsroot/zaptel/tor2.c,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- tor2.c	26 May 2004 15:45:31 -0000	1.19
+++ tor2.c	12 Nov 2004 21:44:02 -0000	1.20
@@ -53,6 +53,10 @@
 
 /* #define ENABLE_TASKLETS */
 
+/* this stuff needs to work for 64 bit systems, however using the macro causes
+   it to take twice as long */
+/* #define FIXTHISFOR64 */  /* as of now, un-comment for 32 bit only system */
+
 #define SPANS_PER_CARD  4
 #define MAX_SPANS       16
 
@@ -131,6 +135,8 @@
 #endif
 
 #define	GPIOC (PLX_LOC_GPIOC >> 1) /* word-oriented address for PLX GPIOC reg. (32 bit reg.) */
+#define	LAS2BRD (0x30 >> 1)
+#define	LAS3BRD (0x34 >> 1)
 #define	INTCSR (0x4c >> 1)  /* word-oriented address for PLX INTCSR reg. */
 #define	PLX_INTENA 0x43 /* enable, hi-going, level trigger */
 
@@ -356,8 +362,8 @@
 	int res,x,f;
 	struct tor2 *tor;
 	unsigned long endjif;
-	volatile unsigned long *gpdata_io;
-	unsigned long gpdata;
+	volatile unsigned long *gpdata_io,*lasdata_io;
+	unsigned long gpdata,lasdata;
 
 	res = pci_enable_device(pdev);
 	if (res)
@@ -508,6 +514,19 @@
 	tor->mem8[CTLREG1] = 0;
 	tor->mem8[LEDREG] = 0;
 
+	/* set the LA2BRD register so that we enable block transfer, read
+	   pre-fetch, and set to maximum read pre-fetch size */
+	lasdata_io = (unsigned long *)&tor->plx[LAS2BRD];
+	lasdata = *lasdata_io;
+	lasdata |= 0x39;
+	*lasdata_io = lasdata;
+
+	/* set the LA3BRD register so that we enable block transfer */
+	lasdata_io = (unsigned long *)&tor->plx[LAS3BRD];
+	lasdata = *lasdata_io;
+	lasdata |= 1;
+	*lasdata_io = lasdata;
+
 	/* check part revision data */
 	x = t1in(tor,1,0xf) & 15;
 #ifdef	NONREVA
@@ -1209,7 +1228,11 @@
 			/* span 4 */
 			txword |= tor->spans[3].chans[n].writechunk[i];
 			/* write to part */
+#ifdef FIXTHISFOR64
+			tor->mem32[tor->datxlt[n] + (32 * i)] = txword;
+#else
 			tor->mem32[tor->datxlt[n] + (32 * i)] = cpu_to_le32(txword);
+#endif
 		}
 	}
 
@@ -1217,7 +1240,11 @@
 	for (n = 0; n < tor->spans[0].channels; n++) {
 		for (i = 0; i < ZT_CHUNKSIZE; i++) {
 			/* read from */
+#ifdef FIXTHISFOR64
+		        rxword = tor->mem32[tor->datxlt[n] + (32 * i)];
+#else
 			rxword = le32_to_cpu(tor->mem32[tor->datxlt[n] + (32 * i)]);
+#endif
 			/* span 1 */
 			tor->spans[0].chans[n].readchunk[i] = rxword >> 24;
 			/* span 2 */