[dahdi-commits] kmoore: linux/trunk r9056 - in /linux/trunk/drivers/dahdi: wct4xxp/ wcte12xp/
SVN commits to the DAHDI project
dahdi-commits at lists.digium.com
Thu Jul 29 16:52:05 CDT 2010
Author: kmoore
Date: Thu Jul 29 16:51:54 2010
New Revision: 9056
URL: http://svnview.digium.com/svn/dahdi?view=rev&rev=9056
Log:
wct4xxp, wcte12xp: restrict signaling and line combinations to what actually works
Modified:
linux/trunk/drivers/dahdi/wct4xxp/base.c
linux/trunk/drivers/dahdi/wcte12xp/base.c
Modified: linux/trunk/drivers/dahdi/wct4xxp/base.c
URL: http://svnview.digium.com/svn/dahdi/linux/trunk/drivers/dahdi/wct4xxp/base.c?view=diff&rev=9056&r1=9055&r2=9056
==============================================================================
--- linux/trunk/drivers/dahdi/wct4xxp/base.c (original)
+++ linux/trunk/drivers/dahdi/wct4xxp/base.c Thu Jul 29 16:51:54 2010
@@ -1827,6 +1827,43 @@
return 0;
}
+static void t4_chan_set_sigcap(struct dahdi_span *span, int x)
+{
+ struct t4_span *wc = container_of(span, struct t4_span, span);
+ struct dahdi_chan *chan = wc->chans[x];
+ chan->sigcap = DAHDI_SIG_CLEAR;
+ /* E&M variant supported depends on span type */
+ if (wc->spantype == TYPE_E1) {
+ /* E1 sigcap setup */
+ if (span->lineconfig & DAHDI_CONFIG_CCS) {
+ /* CCS setup */
+ chan->sigcap |= DAHDI_SIG_MTP2 | DAHDI_SIG_SF |
+ DAHDI_SIG_HARDHDLC;
+ return;
+ }
+ /* clear out sig and sigcap for channel 16 on E1 CAS
+ * lines, otherwise, set it correctly */
+ if (x == 15) {
+ /* CAS signaling channel setup */
+ wc->chans[15]->sigcap = 0;
+ wc->chans[15]->sig = 0;
+ return;
+ }
+ /* normal CAS setup */
+ chan->sigcap |= DAHDI_SIG_EM_E1 | DAHDI_SIG_FXSLS |
+ DAHDI_SIG_FXSGS | DAHDI_SIG_FXSKS | DAHDI_SIG_SF |
+ DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS | DAHDI_SIG_FXOKS |
+ DAHDI_SIG_CAS | DAHDI_SIG_DACS_RBS;
+ } else {
+ /* T1 sigcap setup */
+ chan->sigcap |= DAHDI_SIG_EM | DAHDI_SIG_FXSLS |
+ DAHDI_SIG_FXSGS | DAHDI_SIG_FXSKS | DAHDI_SIG_MTP2 |
+ DAHDI_SIG_SF | DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS |
+ DAHDI_SIG_FXOKS | DAHDI_SIG_CAS | DAHDI_SIG_DACS_RBS |
+ DAHDI_SIG_HARDHDLC;
+ }
+}
+
static int t4_spanconfig(struct dahdi_span *span, struct dahdi_lineconfig *lc)
{
int i;
@@ -1863,6 +1900,10 @@
* iterations */
clear_bit(T4_STOP_DMA, &wc->checkflag);
+ /* make sure that sigcaps gets updated if necessary */
+ for (i = 0; i < span->channels; i++)
+ t4_chan_set_sigcap(span, i);
+
/* If we're already running, then go ahead and apply the changes */
if (span->flags & DAHDI_FLAG_RUNNING)
return t4_startup(span);
@@ -2064,11 +2105,15 @@
if (ts->spantype == TYPE_T1 || ts->spantype == TYPE_J1) {
ts->span.channels = 24;
ts->span.deflaw = DAHDI_LAW_MULAW;
- ts->span.linecompat = DAHDI_CONFIG_AMI | DAHDI_CONFIG_B8ZS | DAHDI_CONFIG_D4 | DAHDI_CONFIG_ESF;
+ ts->span.linecompat = DAHDI_CONFIG_AMI |
+ DAHDI_CONFIG_B8ZS | DAHDI_CONFIG_D4 |
+ DAHDI_CONFIG_ESF;
} else {
ts->span.channels = 31;
ts->span.deflaw = DAHDI_LAW_ALAW;
- ts->span.linecompat = DAHDI_CONFIG_HDB3 | DAHDI_CONFIG_CCS | DAHDI_CONFIG_CRC4;
+ ts->span.linecompat = DAHDI_CONFIG_AMI |
+ DAHDI_CONFIG_HDB3 | DAHDI_CONFIG_CCS |
+ DAHDI_CONFIG_CRC4;
}
ts->span.chans = ts->chans;
ts->span.flags = DAHDI_FLAG_RBS;
@@ -2088,8 +2133,7 @@
for (y=0;y<wc->tspans[x]->span.channels;y++) {
struct dahdi_chan *mychans = ts->chans[y];
sprintf(mychans->name, "TE%d/%d/%d/%d", wc->numspans, wc->num, x + 1, y + 1);
- mychans->sigcap = DAHDI_SIG_EM | DAHDI_SIG_CLEAR | DAHDI_SIG_FXSLS | DAHDI_SIG_FXSGS | DAHDI_SIG_FXSKS | DAHDI_SIG_HARDHDLC | DAHDI_SIG_MTP2 |
- DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS | DAHDI_SIG_FXOKS | DAHDI_SIG_CAS | DAHDI_SIG_EM_E1 | DAHDI_SIG_DACS_RBS;
+ t4_chan_set_sigcap(&ts->span, x);
mychans->pvt = wc;
mychans->chanpos = y + 1;
}
Modified: linux/trunk/drivers/dahdi/wcte12xp/base.c
URL: http://svnview.digium.com/svn/dahdi/linux/trunk/drivers/dahdi/wcte12xp/base.c?view=diff&rev=9056&r1=9055&r2=9056
==============================================================================
--- linux/trunk/drivers/dahdi/wcte12xp/base.c (original)
+++ linux/trunk/drivers/dahdi/wcte12xp/base.c Thu Jul 29 16:51:54 2010
@@ -1480,10 +1480,46 @@
}
#endif
+static void t1_chan_set_sigcap(struct dahdi_span *span, int x)
+{
+ struct t1 *wc = container_of(span, struct t1, span);
+ struct dahdi_chan *chan = wc->chans[x];
+ chan->sigcap = DAHDI_SIG_CLEAR;
+ /* E&M variant supported depends on span type */
+ if (wc->spantype == TYPE_E1) {
+ /* E1 sigcap setup */
+ if (span->lineconfig & DAHDI_CONFIG_CCS) {
+ /* CCS setup */
+ chan->sigcap |= DAHDI_SIG_MTP2 | DAHDI_SIG_SF;
+ return;
+ }
+ /* clear out sig and sigcap for channel 16 on E1 CAS
+ * lines, otherwise, set it correctly */
+ if (x == 15) {
+ /* CAS signaling channel setup */
+ wc->chans[15]->sigcap = 0;
+ wc->chans[15]->sig = 0;
+ return;
+ }
+ /* normal CAS setup */
+ chan->sigcap |= DAHDI_SIG_EM_E1 | DAHDI_SIG_FXSLS |
+ DAHDI_SIG_FXSGS | DAHDI_SIG_FXSKS | DAHDI_SIG_SF |
+ DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS | DAHDI_SIG_FXOKS |
+ DAHDI_SIG_CAS | DAHDI_SIG_DACS_RBS;
+ } else {
+ /* T1 sigcap setup */
+ chan->sigcap |= DAHDI_SIG_EM | DAHDI_SIG_FXSLS |
+ DAHDI_SIG_FXSGS | DAHDI_SIG_FXSKS | DAHDI_SIG_MTP2 |
+ DAHDI_SIG_SF | DAHDI_SIG_FXOLS | DAHDI_SIG_FXOGS |
+ DAHDI_SIG_FXOKS | DAHDI_SIG_CAS | DAHDI_SIG_DACS_RBS;
+ }
+}
+
static int
t1xxp_spanconfig(struct dahdi_span *span, struct dahdi_lineconfig *lc)
{
struct t1 *wc = container_of(span, struct t1, span);
+ int i;
/* Do we want to SYNC on receive or not */
if (lc->sync) {
@@ -1493,6 +1529,10 @@
clear_bit(7, &wc->ctlreg);
span->syncsrc = 0;
}
+
+ /* make sure that sigcaps gets updated if necessary */
+ for (i = 0; i < wc->span.channels; i++)
+ t1_chan_set_sigcap(span, i);
/* If already running, apply changes immediately */
if (test_bit(DAHDI_FLAGBIT_RUNNING, &span->flags))
@@ -1554,12 +1594,14 @@
else
wc->span.channels = 31;
wc->span.spantype = "E1";
- wc->span.linecompat = DAHDI_CONFIG_HDB3 | DAHDI_CONFIG_CCS | DAHDI_CONFIG_CRC4;
+ wc->span.linecompat = DAHDI_CONFIG_AMI | DAHDI_CONFIG_HDB3 |
+ DAHDI_CONFIG_CCS | DAHDI_CONFIG_CRC4;
wc->span.deflaw = DAHDI_LAW_ALAW;
} else {
wc->span.channels = 24;
wc->span.spantype = "T1";
- wc->span.linecompat = DAHDI_CONFIG_AMI | DAHDI_CONFIG_B8ZS | DAHDI_CONFIG_D4 | DAHDI_CONFIG_ESF;
+ wc->span.linecompat = DAHDI_CONFIG_AMI | DAHDI_CONFIG_B8ZS |
+ DAHDI_CONFIG_D4 | DAHDI_CONFIG_ESF;
wc->span.deflaw = DAHDI_LAW_MULAW;
}
wc->span.chans = wc->chans;
@@ -1567,10 +1609,7 @@
init_waitqueue_head(&wc->span.maintq);
for (x = 0; x < wc->span.channels; x++) {
sprintf(wc->chans[x]->name, "WCT1/%d/%d", num, x + 1);
- wc->chans[x]->sigcap = DAHDI_SIG_EM | DAHDI_SIG_CLEAR | DAHDI_SIG_EM_E1 |
- DAHDI_SIG_FXSLS | DAHDI_SIG_FXSGS | DAHDI_SIG_MTP2 |
- DAHDI_SIG_FXSKS | DAHDI_SIG_FXOLS | DAHDI_SIG_DACS_RBS |
- DAHDI_SIG_FXOGS | DAHDI_SIG_FXOKS | DAHDI_SIG_CAS | DAHDI_SIG_SF;
+ t1_chan_set_sigcap(&wc->span, x);
wc->chans[x]->pvt = wc;
wc->chans[x]->chanpos = x + 1;
}
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