It will cause issues if you are using fax/modems on the channel bank and trying to send out via the PRI. We had a great deal of problems with timing sync between 2 spans on a Sangoma A104D until the latest beta drivers were released.
<br><br><div><span class="gmail_quote">On 7/25/06, <b class="gmail_sendername">Shaw Terwilliger</b> <<a href="mailto:sterwill@sourcegear.com">sterwill@sourcegear.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Andrew Kohlsmith wrote:<br>> What I was trying to state was that if you have two data streams that are<br>> solidly clocked but out of phase, you will not encounter any of these issues.<br>> If the clock period of either (or both) drifts then yes, you will run into
<br>> trouble.<br><br>So it sounds like Asterisk can't synchronize the clocks between the<br>Digium and Sangoma boards (or any two PCI boards), and this just may be<br>a limitation of the T1-peripheral-on-PCI architecture. But it really
<br>shouldn't matter because of the nature of my setup: errors caused by<br>timing mismatch between the PRI and channel banks won't cause noticeable<br>quality issues. Do I have it right?<br><br>--<br>Shaw Terwilliger <
<a href="mailto:sterwill@sourcegear.com">sterwill@sourcegear.com</a>><br>SourceGear LLC<br><br><br><br>_______________________________________________<br>--Bandwidth and Colocation provided by <a href="http://Easynews.com">
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</a><br><br><br><br></blockquote></div><br><br clear="all"><br>-- <br>Bruce<br>Nortex Networks