How do you get your system to use IO-APIC style interrupts? I am
running linux-2.6.14 and have enabled "Local APIC support on
uniprocessors" and "IO-APIC support on uniprocessors" in the kernel
options, but /proc/interrupts says that everything is using XT-PIC. I
am running an Intel P3-1200 CPU although I forget what chipset the
machine has. Is there an option in the BIOS of a typical Intel machine
that needs to be enabled in order for this to work?<br>
<br>
This has not been a problem in the past as I have been using only SIP
and IAX connections. But I have ordered a digium TDM card and will be
installing it tomorrow, and I would like to head off any potential
problems if possible.<br>
<br>
-Rusty<br>
<br><br><div><span class="gmail_quote">On 11/9/05, <b class="gmail_sendername">Andrew Kohlsmith</b> <<a href="mailto:akohlsmith-asterisk@benshaw.com">akohlsmith-asterisk@benshaw.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
On Tuesday 08 November 2005 18:20, George Pajari wrote:<br>> To make a long story short, according to Intel Dealer Technical Support<br>> (we became Intel dealers in order to get answers to our questions) there<br>> is no Intel motherboard that permits the IRQs to be configured uniquely.
<br>> They are all hardwired and shared. This information applies to both the<br>> Intel Desktop Board and Server Board product lines.<br><br>I find this almost impossible to believe.<br><br>In XT-PIC mode, absolutely. However every modern chipset utilizes an IOAPIC
<br>now and every device has its own IRQ line. When the IOAPIC is in emulation<br>(XT-PIC) mode, then yes many of the interrupts get "merged" into the standard<br>16 interrupts.<br><br>However, if your Linux kernel is utilizing the IOAPIC's native mode things
<br>change drastically:<br><br># cat /proc/interrupts<br> CPU0<br> 0: 942314955 IO-APIC-edge timer<br> 1: 10 IO-APIC-edge i8042<br> 8: 1 IO-APIC-edge rtc<br> 9: 0 IO-APIC-level acpi
<br> 12: 111 IO-APIC-edge i8042<br> 14: 496236 IO-APIC-edge ide0<br>177: 211098355 IO-APIC-level eth0<br>185: 2 IO-APIC-level ehci_hcd:usb1<br>193: 0 IO-APIC-level ohci_hcd:usb2
<br>201: 0 IO-APIC-level ohci_hcd:usb3<br>209: 86 IO-APIC-level ohci_hcd:usb4<br>217: 3769265646 IO-APIC-level wct4xxp<br><br>As you can see on this particular system (not an Intel reference board,
<br>granted, but my Intel boards do work similarly) everything is on its own<br>interrupt, and the interrupt numbers don't stop at 15.<br><br>I'd really like some clarification on that... Do Intel reference boards<br>actually tie the physical INT# signals of peripherals together, or are they
<br>just stating that unless you use the native IO-APIC mode you will have shared<br>interrupts due to the "emulation"?<br><br>Hopefully someone from Digium will step in and give the official word, because<br>I have it on good authority that Digium hardware on Intel motherboards work
<br>well together. Hell, I've had my old P4 Intel reference board (with RamBus<br>memory) work just fine without shared interrupts.<br><br>-A.<br>_______________________________________________<br>--Bandwidth and Colocation sponsored by
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