[asterisk-dev] MFC/R2 Asterisk Channel Driver

Steve Underwood steveu at coppice.org
Sat Mar 29 10:03:40 CDT 2008


Luis Antonio Prata Barbosa wrote:
> >> 1) For example, is a 600MHz DSP faster than a 2GHz dual xeon ? I 
> know  DSP
> >> has multi-level pipelines, MACs and Harvard bus... but anyone know 
> if there
> >> was a well coded (SMP) application using dual cores and reserving 
> one entire
> >> core for DSP purposes to let us to compare performances ???
>
> >The Zaptel echo canceller runs from the interrupt handler of the card's
> >interrupts. You can easily control on which CPU this will occour..
> >
> >But I don't really see what you have to gain from this.
>  
> Well, I`ve seen hardware cancelation boards using TI TMS320C55xx 
> family for 60 channels 64ms...
> I Think this DSP is slower than a single core of a dual core 
> processor, so if I reserve 1 core only for echo cancelations, why my 
> pc based system should be slower or worse than hardware based ?????
>  
> I think this occurs because the code is not optimized ! So, instead of 
> put everything in hardware, why not study the case better and optimize 
> (even rewrite) the code ???
>  
> Someone maybe already has studied the problem and could give me a 
> good reason to believe that is not possible do it with a PC, but until 
> now I am not convinced.
For something like G.729 encode/decode a direct comparison between a 
processor on a card and host processing comes down to a 1:1 comparison 
of their processing performance (not their MIPS - a customised DSP 
processor's instructions typically do the work of several general 
purpose processor instructions, and quality of match between the working 
set and the cache size has a huge (10-20 fold) impact on speed on a 
Pentium class processor). Echo cancellation is a special case. The 
adaption process in an echo cancellor is a control loop, and it gets 
bogged down in latency issues when run on the host processor. To keep 
the signal latency low means loosing most of the benefits of PCI bus 
mastering (those nasty 1ms chunks that many cards work in), and 
suffering enormous context switching overheads.

The code for the good host echo cancellors is already quite well 
optimised, typically using the MMX instruction set.

Regards,
Steve




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