[asterisk-dev] MFC/R2 Asterisk Channel Driver

[Luis Antonio Prata Barbosa]

>> 1) For example, is a 600MHz DSP faster than a 2GHz dual xeon ? I
know  DSP
>> has multi-level pipelines, MACs and Harvard bus... but anyone know if
there
>> was a well coded (SMP) application using dual cores and reserving one
entire
>> core for DSP purposes to let us to compare performances ???

>The Zaptel echo canceller runs from the interrupt handler of the card's
>interrupts. You can easily control on which CPU this will occour..
>
>But I don't really see what you have to gain from this.

 Well, I`ve seen hardware cancelation boards using TI TMS320C55xx family for
60 channels 64ms...
I Think this DSP is slower than a single core of a dual core processor, so
if I reserve 1 core only for echo cancelations, why my pc based system
should be slower or worse than hardware based ?????

I think this occurs because the code is not optimized ! So, instead of put
everything in hardware, why not study the case better and optimize (even
rewrite) the code ???

Someone maybe already has studied the problem and could give me a
good reason to believe that is not possible do it with a PC, but until now
I am not convinced.

Luis A P Barbosa




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