[asterisk-dev] Kernel modules => mainline kernel

[Matthew Fredrickson]

On Feb 21, 2007, at 1:47 PM, Paul Cadach wrote:

> Kevin P. Fleming wrote:
> [skipped]
>> F) broken math - This example (for 4 quad T1/E1 cards in E1 mode) was
>> offered:
>>
>> So 4 Quad-PRI cards with this driver will generate 4000 
>> interrupts/sec.
>>   Let's compare the data volume:
>>     8bytes * 30channels * 4ports * 2[R/W] * 1000/sec <= 2Kb/sec of 
>> PCM.
>
> To be clear, for one quad PRI card data transfer rate will be
> 8 bytes * 31 (!) channels * 4 ports * 2[R/W] * 1000/sec = 1924000 
> bytes per second (or 1924 bytes per interrupt)
>
> for 4 quad-PRI cards data rate will be 4 times more: 7936000 bytes per 
> second.
>
> (all values without PCI overhead, talks to framer, FPGA, etc.). 
> Combining of interrupts will not combine DMA transfers.
>
> Usage of some sort of high-speed TDM bus (H.100/H.110, for example, 
> 1024 PCMs) can aggregate interrupts _and DMA transfers_.

Sorry to be pedantic here guys, but if we are already on this path, the 
number of channels actually transfered per span is 32 :-) (IIRC)

Matthew Fredrickson