[Asterisk-Dev] X101P register map data please?

[Mark Burton]

Hi, I've been trying to debug the problem with the X101P  giving FXO 
PCI Master Aborts... I'm doing this blind, and I really need some info 
on the X101P's register map - or best of all, the conditions under 
which it can generate an IRQ with a mask of 0x10.

I have so far set up the mask for the IRQ's in the interrupt handler 
(so the poor thing doesn't keep getting them)[as per previous post], 
then patched ztcfg so it actually starts the watchdog (which is assumed 
by the driver, but in reality doesn't happen - of course it doesn't 
need to, because under normal conditions there is no need for the 
watchdog - I guess?)

That much gives me a system which runs, hits a PCI Master abort (or at 
least an IRQ with a mask of 0x10), and then stops the dma, masks the 
IRQ... then the watchdog starts the dma again, unmasks the IRQ, at 
which point  it gets another IRQ before the next watchdog beat.... so 
the watchdog can't help.

I have tried being a bit more brutal with the activities in the 
watchdog routine.... I just caused myself some kernel panic's :-)

Again, any help appreciated!

Cheers

Mark.