[Asterisk-Dev] TE405P *hardware* question

[Andrew Kohlsmith]

> As for TTL specification, "0" voltage must be between 0 and 0.8V, and "1"
> voltage must be between 2.4 and 5V, so LVTTL (3.3V)with their levels must
> comply with TTL spec. So, I don't see any is no problem if you connect
> zener-protected pins (5V tolerant) to 3.3V system.

This is the biggie -- it's already all 5V compliant and safe, and the PCI 2.2 
spec says that everything on the PCI bus must be 5V tolerant (it's been a 
while since I've been reading the spec, I might be wrong) -- but yeah -- Voh 
on the Spartan-II is 90% of Vcco on both the 5V and 3.3V pads.  

Interestingly enough the PCI33_3 minimum Voh is 300mV higher than the PCI33_5 
pad specification.  

> There was for Xilinx. But what about PEF? As I see for one used for TE410P
> (to remember - I don't have TE405P to check which chips used for it), there
> was 3.3V-only chips, so IMHO TE405P must have any sort of 3.3V source (from
> onboard regulator or  from PCI connector).

PEF?  You mean the quad T1 framer?  That is all sufficiently isolated from the 
PCI bus that I don't think it'd be a problem, and 5V power is available even 
on 3.3V PCI sockets.

> Any way, I don't see any problems to connect TE405P to 3.3V bus (after
> making second, 3.3V, key hole). But I'm not Digium's hardware engineer...
> ;-)' I think there would be dual-voltage TE405P+ cards (TE405P with two key
> holes) available when all TE410P "already-made" will be sold out. ;-)'

Well I am glad that I'm not the only one who thinks it might be possible.  I 
realize that neither of us have the real answer.  I am hoping that someone 
from Digium replies with a "definitely UNSUPPORTED, WARRANTY-VOIDING" type of 
response.

I'm gonna give it a few more days to build up my courage about frying a $1500 
card and possibly high-end motherboard too...  but this is the kind of thing 
I live for.  :-)

Regards,
Andrew