[aadk-commits] dbailey: u-boot/trunk r120 - in
/u-boot/trunk/u-boot_1.1.3: board/s800i/ cpu/...
aadk-commits at lists.digium.com
aadk-commits at lists.digium.com
Wed Jan 10 16:20:36 MST 2007
Author: dbailey
Date: Wed Jan 10 17:20:36 2007
New Revision: 120
URL: http://svn.digium.com/view/aadk?view=rev&rev=120
Log:
Added a mechanism to allow the s800i CPU to force a hardware reset when it detects a soft reset
Added initialization code to remove VLAN settings from phy for u-boot.
Modified:
u-boot/trunk/u-boot_1.1.3/board/s800i/adm.c
u-boot/trunk/u-boot_1.1.3/board/s800i/s800i.c
u-boot/trunk/u-boot_1.1.3/cpu/bf533/start.S
u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h
u-boot/trunk/u-boot_1.1.3/lib_blackfin/board.c
Modified: u-boot/trunk/u-boot_1.1.3/board/s800i/adm.c
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/board/s800i/adm.c?view=diff&rev=120&r1=119&r2=120
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/board/s800i/adm.c (original)
+++ u-boot/trunk/u-boot_1.1.3/board/s800i/adm.c Wed Jan 10 17:20:36 2007
@@ -30,6 +30,8 @@
#include "adm.h"
static int portmap[] = { 0x1, 0x3, 0x5, 0x7, 0x8, 0x9 };
+/* Addresses of blocks of std MII Phy registers for each port */
+static int phymap[] = { 0x200, 0x220, 0x240, 0x260, 0x280};
static void adm_wait(void)
{
@@ -42,9 +44,11 @@
adm_wait();
*pEMAC_STADAT = Data;
+ __builtin_bfin_ssync();
*pEMAC_STAADD = ((RegAddr & 0x3ff) << 6) |
STAOP | STAIE | STABUSY;
+ __builtin_bfin_ssync();
}
/*********************************************************************************
@@ -58,6 +62,7 @@
*pEMAC_STAADD = ((RegAddr & 0x3ff) << 6) |
STAIE | STABUSY;
+ __builtin_bfin_ssync();
adm_wait();
@@ -66,30 +71,79 @@
return Data;
}
-
void adm_init(void)
{
int x;
+ int done;
+ int timeout;
u16 sysctl;
+
+ /* Set MII interface on Port H */
+ *pPORTH_FER = 0xffff;
+ __builtin_bfin_ssync();
/* Enable PHY output */
*pVR_CTL |= PHYCLKOE;
+ __builtin_bfin_ssync();
/* MDC = 2.5 MHz */
sysctl = SET_MDCDIV(24);
/* Odd word alignment for Receive Frame DMA word */
/* Configure checksum support and rcve frame word alignment */
sysctl |= RXDWA | RXCKS;
*pEMAC_SYSCTL = sysctl;
+ __builtin_bfin_ssync();
/* Check signature */
for (x=0;x<10;x++)
adm_read(0);
if (adm_read(0) != 0x4154)
return;
+
+ printf("Switch: ADM6996I/IX\n");
+
+ /* Reset all the phys */
+ /* Not sure if this really buys us anything */
+ for (x=0;x<5;x++) {
+ adm_write(phymap[x], 0x8000);
+ }
+
+ /* insure that all the phys have been reset */
+ for(timeout = 0, done = 0; 0 == done && 1000 > timeout; timeout++){
+ done = 1;
+ for (x=0;x<5;x++) {
+ if(0x8000 & adm_read(phymap[x])){
+ done = 0;
+ }
+ }
+ }
+
+ /* set VLAN control and VLAN configuration regs to their reset value */
+ /* turn off all ports */
+ for (x=0; x<=5; x++) {
+ adm_write(portmap[x], 0x40f);
+ }
+
+ /* Turn off the VLAN activity */
+ adm_write(0x0a, 0x5902); /* System Control 0 to reset val */
+ adm_write(0x0b, 0x8001); /* System Control 1 to reset val */
+ adm_write(0x0c, 0x0000); /* multicast snooping to reset val */
+ adm_write(0x0d, 0x0000); /* ARP/RARP Register to reset val */
+ adm_write(0x0e, 0xfa50); /* VLAN Priority Map Register to reset val */
+ adm_write(0x0f, 0xfa50); /* TOS Priority Map Register to reset val */
+ adm_write(0x10, 0x8001); /* System Control Register 2 to reset val */
+ adm_write(0x11, 0xe300); /* System Control Register 3 to reset */
+ adm_write(0x12, 0x3600); /* System Control Register 4 to reset */
+ adm_write(0x13, 0x01d5); /* Port 0 Security to reset val */
+
+ /* clear VLAN filters */
+ for(x = 0x40; x <= 0x5f; ){
+ adm_write(x++, 0x3f); /* Low VLAN filter */
+ adm_write(x++, 0x8001); /* High VLAN filter */
+ }
+
+ /* Enable the first port only */
adm_write(portmap[0], 0x840F);
for (x=1;x<5;x++) {
adm_write(portmap[x], 0x842F);
}
- printf("Switch: ADM6996I/IX\n");
-
-
+
}
Modified: u-boot/trunk/u-boot_1.1.3/board/s800i/s800i.c
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/board/s800i/s800i.c?view=diff&rev=120&r1=119&r2=120
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/board/s800i/s800i.c (original)
+++ u-boot/trunk/u-boot_1.1.3/board/s800i/s800i.c Wed Jan 10 17:20:36 2007
@@ -399,4 +399,34 @@
printf("\n");
return result;
}
-#endif
+
+#endif
+
+#ifdef S800I_RESET_HARDEN
+/*
+ * S800i card has the ability to activate a hard reset activating the
+ * Port G14 IO pin. This pin is connected into the hardware reset circuit
+ * and simulates pushing the reset button
+ */
+
+int handle_reset_source(unsigned short swrst_image)
+{
+ int ret_val = 0;
+ long wait;
+ /* If SWRST reg indicates soft reset, watchdog, or double fault */
+ if(0 != (swrst_image & 0xE000)){
+ *pPORTG_FER &= ~(1<<14);
+ *pPORTGIO_SET |= (1<<14);
+ *pPORTGIO_DIR |= (1<<14);
+ __builtin_bfin_ssync();
+ for(wait = 0; wait < 10000000; wait++){}
+ *pPORTGIO_CLEAR |= (1<<14); /* drive hard reset */
+ __builtin_bfin_ssync();
+ for(wait = 0; wait < 10000000; wait++){}
+ /* Should have rebooted by now */
+ ret_val = -1; /* Reaches here only if hardware circuit fails. */
+ }
+ return ret_val;
+}
+
+#endif
Modified: u-boot/trunk/u-boot_1.1.3/cpu/bf533/start.S
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/cpu/bf533/start.S?view=diff&rev=120&r1=119&r2=120
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/cpu/bf533/start.S (original)
+++ u-boot/trunk/u-boot_1.1.3/cpu/bf533/start.S Wed Jan 10 17:20:36 2007
@@ -133,7 +133,9 @@
lc1 = r0;
SSYNC;
-
+
+ /* I will handle the software reset clear later */
+#ifndef S800I_RESET_HARDEN
/* Check soft reset status */
p0.h = SWRST >> 16;
p0.l = SWRST & 0xFFFF;
@@ -149,7 +151,8 @@
no_soft_reset:
nop;
-
+#endif
+
/* Clear EVT registers */
p0.h = (EVT_EMULATION_ADDR >> 16);
p0.l = (EVT_EMULATION_ADDR & 0xFFFF);
Modified: u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h?view=diff&rev=120&r1=119&r2=120
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h (original)
+++ u-boot/trunk/u-boot_1.1.3/include/configs/s800i.h Wed Jan 10 17:20:36 2007
@@ -336,4 +336,10 @@
#define CFG_ATA_STRIDE 1 /* CF.A0 --> Blackfin.A1 */
#endif
-#endif
+/*
+ * Turn soft resets into hardware reset option with the s800i board
+ * Uses PortG pin 14.
+ */
+#define S800I_RESET_HARDEN 1
+
+#endif
Modified: u-boot/trunk/u-boot_1.1.3/lib_blackfin/board.c
URL: http://svn.digium.com/view/aadk/u-boot/trunk/u-boot_1.1.3/lib_blackfin/board.c?view=diff&rev=120&r1=119&r2=120
==============================================================================
--- u-boot/trunk/u-boot_1.1.3/lib_blackfin/board.c (original)
+++ u-boot/trunk/u-boot_1.1.3/lib_blackfin/board.c Wed Jan 10 17:20:36 2007
@@ -43,6 +43,10 @@
#ifndef CFG_NO_FLASH
extern flash_info_t flash_info[];
+#endif
+
+#ifdef S800I_RESET_HARDEN
+int handle_reset_source(unsigned short swrst_image);
#endif
static inline u_long get_vco(void)
@@ -192,6 +196,11 @@
ulong addr;
bd_t *bd;
+#ifdef S800I_RESET_HARDEN
+ handle_reset_source(*pSWRST);
+ *pSWRST = 0; /* clear the soft reset */
+#endif
+
gd = (gd_t *) (CFG_GBL_DATA_ADDR);
memset((void *) gd, 0, sizeof(gd_t));
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